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by
Ingo Cyliax
Start
• Design Flow
Sources and PDF
In this installment,
I want to take a look at the design tools you will
need to start designing with FPGAs and CPLDs. This
is actually a pretty complicated topic, possibly
even more involved than the architecture overview
I covered last time.
DESIGN TOOLS
FPGA/CPLD vendors are
primarily interested in developing what is called
the back end. It's the pieces of software you'd
need to take a design that has been captured either
in schematics or high-level description language
(HDL) into a form that can be used to program a
part.
However, because the
EDA tool industry is fairly dynamic and FPGA/CPLD
parts keep evolving, the software developers for
back-end tools fight a battle on two fronts. They
not only have to develop libraries for different
EDA tools and simulators, they have to come up with
better fitters and routers for new parts that have
more resources and complex architectures. All while
maintaining an image that it's "easy."
Evolving interchange
standards like EDIFand Verilog/VHDL help standardize
interfaces to CAD tools and simulators. For example,
a CAD vendor can now provide an EDIF-compatible
library of design elements that use Verilog or VHDL
to implement the models necessary for simulation
environments. Of course, there are still some glitches,
but things are getting better.
Realizing that there
is a potentially large learning curve, FPGA/CPLD
vendors are also offering cost-effective, entry-level
design environments. These are complete packages
with design entry, simulators, libraries, and the
back end. Later, I will show you one of these packages.
These design environments
are certainly good for learning FPGA/CPLD development
and, in many cases, actually designing fairly large
designs. However, if your organization already standardizes
on one CAD environment, these packages may not be
of much help, and you're back to the integration
game. If you're one of these organizations, you
probably have the resources to handle the integration
to a specific FPGA/CPLD back end.
For the rest, going
with a FPGA/CPLD design environment from the FPGA/CPLD
vendor is probably one of the best ways to go. There’s
a lot of support on the vendor's web site for these
packages, because if you get good at designing for
their parts, they hope to sell a large quantity
of them.
The particular package
I want to look at with you this month is Xilinx's
Foundation environment. Foundation is a representative
of other environments. It's also very complete.
Finally, if you're a student or someone that just
wants to learn this stuff, Xilinx has a student
edition of this package, which sells for under $100
and includes a good tutorial style text book that
will work you through the tool.
The student edition
is not a crippled version of Foundation, except
that it only supports some of the small/medium-sized
devices. After you come up to speed and want to
try a commercial design, you should go ahead and
purchase the production version. It comes with a
support contract, where the student version doesn't.
Let's get started.
NEXT
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